Error correcting memory codes or we can say error checking and correction memory codes are those codes which allow data being read and transmitted to be tested for errors. It is different from parity checking and controlling because in this errors are not only assessed but also corrected after detection. When data rate increases such error correcting memory codes are specifically designed in the form of data storage and transmitting hardware.
Following is the manner in which error correction memory works:
• When any data unit or any unit is stored in memory RAM or in peripheral storage then calculation is made of the code which describes the sequence of the bit in the word or unit. After this it is stored in the particular unit of data. For every 64 bits unit, an additional amount of 7 bits is needed for storage of this code.
• When a request is made to the unit for reading it, calculation is repeated by using the constant algorithm for the code in the storage and the about to read unit. The code which is generated newly is then compared with the initial code as generated in first step.
• In the next step we analyze as to whether the new code matches the old one or not. If it successfully matches then the code is free of errors.
• If new code does not match the old one then the bits which are missing are detected through comparison of code and the bits supplied for the purpose of correction.
• The data which is in storage is not touched for any correction. It is overlaid by the data generated eventually and with assumption of having errors as transient the bits which are incorrect will fade away.
• But even if the error repeats by turning off the computer again and again then it definitely indicates a permanent nature of error in the hardware of the system because error cannot recur at constant places of storage. In such cases message is communicated to the log or to the administrator of the system in which indication is given regarding the location of recurrent errors.
• Error correction memory codes are required in addition at levels of 64 bits and parity checking also requires the same but in reality correction memory code has the advantage of increasing the computation reliability and that of telecommunication system or a part of it without incurring high costs.
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